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  october 2011 ? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 FMS6404 ? precision composite video output with sound trap and group delay compensation FMS6404 precision composite video output with sound trap and group delay compensation features ? 7.6mhz 5th-order com posite video filter ? 14db notch at 4.425mhz to 4.6mhz for sound trap capable of handling stereo ? 50db stopband attenuation at 27mhz on cv output ? > 0.5db flatness to 4.2mhz on cv output ? equalizer and notch filter for driving rf modulator with group delay of -180ns ? no external frequency selection components or clocks ? < 5ns group delay on cv output ? ac-coupled input ? ac- or dc-coupled output ? capable of pal frequency for cv ? continuous time low-pass filters ? <1.4% differential gain with 0.7 differential phase on cv channel ? integrated dc restore circuitry with low tilt applications ? cable set-top boxes ? satellite set-top boxes ? dvd players description the FMS6404 is a single composite video 5th-order butterworth low-pass video filter optimized for minimum overshoot and flat group dela y. the device contains an audio trap that removes video information in a spectral location of the subsequent rf audio carrier. the group delay compensation circuit pre-distorts the signal to compensate for the inhere nt receiver intermediate frequency (if) filter?s group delay distortion. in a typical application, the composite video from the dac is ac coupled into the filter. the cv input has dc- restore circuitry to clamp the dc input levels during video synchronization. the clamp pulse is derived from the cv channel. all outputs are capable of driving 2v pp , ac- or dc- coupled, into either a single or dual video load. a single video load consists of a series 75 ? impedance matching resistor connected to a terminated 75 ? line. this presents a total of 150 ? of loading to the part. a dual load would be two of these in parallel, which presents a total of 75 ? to the part. the gain of the cv signal is 6db with 1v pp input levels. all video channels are clamped during synchronization to establish the appropriate output voltage reference levels. related resources ? an-6024 ? fms6xxx product series understanding analog video signal clamps, bias, dc restore, and ac or dc coupling methods ? an-6041 ? pcb layout considerations for video filter / drivers ordering information part number operating temperature range package packing method FMS6404csx -40c to +70c 8-lead, small-outline integrated circuit (soic), jedec ms-012, .150" narrow body 2500 units per reel
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 2 FMS6404 ? precision composite video output with sound trap and group delay compensation block diagram figure 1. block diagram pin configuration figure 2. pin assignments (top view) pin definitions pin# name type description 1 cv in input composite video input 2 eq_notch output composite video output to rf modulator 3 gnd power device ground connection 4 nc na no connection 5 nc na no connection 6 nc na no connection 7 vcc power device power connection 8 cv out output composite video output
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 3 FMS6404 ? precision composite video output with sound trap and group delay compensation absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. unit v cc dc supply voltage -0.3 6.0 v v io analog and digital i/o -0.3 v cc +0.3 v v out maximum output current, do not exceed 100 ma electrostatic discharge information symbol parameter min. unit esd human body model, jesd22-a114 8 kv charged device model, jesd22-c101 2 reliability information symbol parameter min. typ. max. unit t j junction temperature +150 c t stg storage temperature range -65 +150 c t l lead temperature (soldering, 10 seconds) +300 c  ja thermal resistance, jedec standard, multilayer test board, still air 90 c/w recommended operating conditions the recommended operating conditions table defines th e conditions for actual device operation. recommended operating conditions are specified to en sure optimal performance to the datash eet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. typ. max. unit t a operating temperature range 0 +70 c v cc supply voltage range 4.75 5.00 5.25 v dc electrical characteristics t a =25c, v cc =5.0v, r s =37.5 ? , all inputs are ac-coupled with 0.1f, and all outputs are ac coupled with 220f into 150 ? load; unless otherwise noted. symbol parameter condition min. typ. max. unit v cc supply voltage range v s range 4.75 5.00 5.25 v i cc quiescent supply current v s =+5.0v, no load 50 70 90 ma v in video input voltage range referenced to gnd if dc coupled 1.4 v pp psrr power supply rejection ratio dc -50 db i sc output short circuit current cv, eq_notch to gnd 85 ma
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 4 FMS6404 ? precision composite video output with sound trap and group delay compensation ac electrical characteristics t a =25c, v cc =5.0v, r s =37.5 ? , all inputs are ac-coupled with 0.1f, and all outputs are ac coupled with 220f into 150 ? load, unless otherwise noted. symbol parameter condition min. typ. max. unit av cv low frequency gain cv out at 400khz 5.8 6.0 6.2 db av eq low frequency gain (eq_notch) at 400khz 5.7 6.0 6.4 db cv sync cv out output level (during sync) sync present on cv in (after 6db gain) 0.35 0.50 v eq sync eq_notch output level (during sync) sync present on cv in (after 6db gain) 0.35 0.50 v t clamp clamp response time cv out settled to within 10mv 5 ms f flat gain flatness to 4.2mhz cv out -0.5 0 0.5 db f c -3db bandwidth cv out channel 6.7 7.6 mhz f sb stopband attenuation cv out at 27mhz 40 50 db dg differential gain cv out 1.4 3.0 % dq differential phase cv out 0.7 1.5 thd output distortion v out =1.4v pp at 3.58mhz 0.3 % x talk crosstalk v out =1.4v pp at 3.58mhz -50 db snr snr cv out channel ntc-7 weighting 4.2mhz low-pass v in =714mv, v out =1.428v pp /1.010vrms 70 75 db snr eq_notch channel ntc-7 weighting 4.2mhz low-pass v in =714mv v out =1.428vpp/1.010vrms 65 70 db t pd propagation delay at 400khz 112 ns gd group delay cv out at 3.58mhz (reference to 400khz) -5 0 5 ns t clgcv chroma-luma gain cv out f=3.58mhz (reference to 400khz) 98 100 102 % t cldcv chroma-luma delay cv out f=3.58mhz (reference to 400khz) -10 0 10 ns t gdeq group delay eq_notch f=3.58mhz (reference to 400khz) -195 -180 -165 ns t clgeq chroma-luma gain eq_notch f=3.58mhz (reference to 400khz) 95 100 105 % t cldeq chroma-luma delay eq_notch f=3.58mhz (reference to 400khz) -195 -180 -165 ns dg eq differential gain eq_notch channel 0.3 1.0 % dq eq differential phase eq_notch channel 0.30 0.75 % mcf modulator channel flatness eq_notch fr om 400khz to 3.75mhz -0.5 0 0.5 db av pk gain peaking eq_notch from >3.75mhz to 4.2mhz -0.5 0 0.5 db atten1 notch attenuation 1 eq _notch at 4.425mhz 14 db atten2 notch attenuation 2 eq _notch at 4.5mhz 20 db atten3 notch attenuation 3 eq _notch at 4.6mhz 14 db t pass passband group delay eq_notch f=400khz to f=3mhz -35 35 ns
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 5 FMS6404 ? precision composite video output with sound trap and group delay compensation typical performance characteristics unless otherwise noted, t a = 25c, v cc = 5.0v, r s = 37.5 ? , and ac-coupled output into 150 ? load, cv out . figure 3. frequency response figure 4. group delay vs. frequency figure 5. differential gain figure 6. differential phase figure 7. noise vs. frequency
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 6 FMS6404 ? precision composite video output with sound trap and group delay compensation typical performance characteristics unless otherwise noted, t a = 25c, v cc = 5.0v, r s = 37.5 ? , and ac-coupled output into 150 ? load, cv out . figure 8. modulator vs. frequency response figure 9. delay modulator output figure 10. differential gain, mod out figure 11. differential phase, mod out figure 12. noise vs. frequency modulator ch annel figure 13. group delay vs. frequency
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 7 FMS6404 ? precision composite video output with sound trap and group delay compensation applications information layout considerations general layout and supply bypassing play a major role in high-frequency performance and thermal characteristics. fairchild offers a four-layer board with full power and ground planes board to guide layout and aid device evaluation. followi ng this layout configuration provides optimum performance and thermal characteristics for the device. for best results, follow the steps and recommended routing rules below. recommended routing / layout rules ? do not run analog and digital signals in parallel. ? use separate analog and digital power planes to supply power. ? traces must run on top of the ground plane. ? no trace should run over ground/power splits. ? avoid routing at 90-degree angles. ? minimize clock and video data trace length differences. ? include 10 f and 0.1 f ceramic power supply bypass capacitors. ? place the 0.1 f capacitor within 2.54mm (0.1in) of the device power pin. ? place the 10 f capacitor within 19.05mm (0.75in) of the device power pin. ? for multi-layer boards, use a large ground plane to help dissipate heat. ? for two-layer boards, use a ground plane that extends beyond the device body at least 12.7mm (0.5in) on all sides. include a metal paddle under the device on the top layer. ? minimize all trace lengths to reduce series inductance. output considerations the outputs are dc offset from the input by 150mv; therefore, v out = 2 ? v in dc + 150mv. this offset is required for optimal performance from the output driver and is held at the minimum value to decrease the standing dc current into the load. since the FMS6404 has a 2 x (6db) gain, the output is typically connected via a 75 ? -series back-matching resistor, followed by the 75 ? video cable. due to the inherent divide-by-two of this configuration, the blanki ng level at the load of the video signal is always less than 1v. when ac-coupling the output, ensure that the coupling capacitor passes the lowest frequency content in the video signal and that line time distortion (video tilt) is kept as low as possible. the selection of the coupling capacitor is a function of the subsequent circuit input impedance and the leakage current of the input being dr iven. to obtain the highest quality output video signal, the series termination resistor must be placed as close to the device output pin as possible. this greatly reduces the parasitic capacitance and inductance effect on the output driver. the distance from the device pin to the series termination resistor should be no greater than 2.54mm (0.1in). figure 14. termination resistor placement thermal considerations since the interior of most systems, such as set-top boxes, tvs, and dvd players; is at +70oc; consideration must be given to providing an adequate heat sink for the device package for maximum heat dissipation. when designing a system board, determine how much power each device dissipates. ensure that devices of high power are not placed in the same location, such as directly above (top plane) or below (bottom plane) each other on the pcb. pcb thermal layout considerations ? understand the system power requirements and environmental conditions. ? maximize thermal performance of the pcb. ? consider using 70 m of copper for high-power designs. ? make the pcb as thin as possible by reducing fr4 thickness. ? use vias in power pad to tie adjacent layers together. ? remember that baseline temperature is a function of board area, not copper thickness. ? modeling techniques provide a first-order approximation.
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 8 FMS6404 ? precision composite video output with sound trap and group delay compensation physical dimensions figure 15. 8-lead, small-outline integrated ci rcuit (soic), jedec ms-012, .150" narrow body package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . 8 0 see detail a notes: unless otherwise specified a) this package conforms to jedec ms-012, variation aa, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x175-8m. e) drawing filename: m08arev13 land pattern recommendation seating plane c gage plane x 45 detail a scale: 2:1 pin one indicator 4 8 1 b 5 a 5.60 0.65 1.75 1.27 6.20 5.80 3.81 4.00 3.80 5.00 4.80 (0.33) 1.27 0.51 0.33 0.25 0.10 1.75 max 0.25 0.19 0.36 0.50 0.25 r0.10 r0.10 0.90 0.40 (1.04) option a - bevel edge option b - no bevel edge 0.25 cba 0.10 c
? 2011 fairchild semiconductor corporation www.fairchildsemi.com FMS6404 ? rev. 1.0.0 9 FMS6404 ? precision composite video output with sound trap and group delay compensation


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